This course is necessary for companies involved in Integrated Circuit or VLSI design, developing ASSP, ASIC or IPs. This course can also serve as supplementary knowledge for electronics assembly, packaging and test companies, to appreciate and understand the complexities and issues involved in SoC based products.
Over the past years as Integrated Circuits became increasingly more complex, the industry embraced new design and reuse methodologies that are commonly termed System on a Chip (SoC) design. This course focuses on the integration and reuse issues of custom analog and mixed signal components within an SoC design.
The reusable components called intellectual property (IP) blocks or cores can of two types; synthesizable register transfer level (RTL) blocks called soft IP cores or layout level designs called hard IP cores. Design for reusability, noise, crosstalk, power-ground strategies, design for test methodologies, verification issues and such need to be addressed in IP integration.
Course is designed for:
Digital/Analog/Mixed Signal Integrated Circuit Design Engineers
SoC Products & Design Engineers
Knowledge to design/modify AMS IPs to be re-usable
Knowledge to design/modify AMS IPs to better integrate into SoC
Knowledge to design/modify AMS IPs to be testable
Efficiency in identifying and recognizing issues or problems with third-party provided AMS IPs Custom Analog and Mixed Signal Integration for System On a Chip
For enquiries contact Ms Shazana at 03-5513 3560 or Email to: firstname.lastname@example.org
click HERE to register online.